View SP26LV432CN_775193.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
Preliminary
SP26LV432
High Speed, Low Power Quad RS-422 Differential Line Receiver
Quad Differential Line Receivers Compatible with the EIA standard for RS-422 serial protocol High-Z Output Control 14ns Typical Receiver Propagation Delays 60mV Typical Input Hysteresis Single +3.3V Supply Operation Common Receiver Enable Control Compatibility with the industry standard 26LV32 -7.0V to +7.0V Common-Mode Input Voltage Range Switching Rates Up to 50Mbps Ideal for use with SP26LV431 Quad Drivers
RI1B RI1A R01 ENABLE R02 RI2A RI2B GND 1 2 3 4 5 6 7 8 SP26LV432 16 VCC 15 RI4B 14 RI4A 13 R04 12 ENABLE 11 R0 3 10 RI A 3 9 RI B 3
DESCRIPTION The SP26LV432 is a quad differential line receiver with 3-State outputs designed to meet the specifications of RS-422. The SP26LV432 features Sipex's BiCMOS process allowing low power operational characteristics of CMOS technology while meeting all of the demands of the RS-422 serial protocol over 50Mbps under load. The RS-422 protocol allows up to 10 receivers to be connected to a multipoint bus transmission line. The SP26LV432 features a receiver enable control common to all four receivers and a high-Z output with 6mA source and sink capability. Since the cabling can be as long as 4,000 feet, the RS-422 receivers of the SP26LV432 are equipped with a wide (-7.0V to +7.0V) common-mode input voltage range to accommodate ground potential differences. TYPICAL APPLICATION CIRCUIT
ENABLE LOW HIGH HIGH don't care don't care HIGH don't care ENABLE HIGH don't care don't care LOW LOW don't care LOW Input don't care VID > VTH (max) VID < VTH (min) VID > VTH (max) VID < VTH (min) open open Output high-Z HIGH LOW HIGH LOW HIGH HIGH
VCC
RI A RI B 4 4
INPUTS
RI A RI B 3 3 RI A RI B 2 2 RI A RI B 1 1
ENABLE ENABLE
R04 GND
R03
R02
R01
OUTPUTS
Rev:A Date: 3/08/04
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
(c) Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. VCC (Supply Voltage) ................................................................... +7.0V VCM (Common Mode Range) ........................................................ 14V VDIFF (Differential Input Voltage) .................................................. 14V VIN (Enable Input Voltage) ................................................... VCC + 1.5V TSTG (Storage Temperature Range) ........................... -65C to +150C Lead Temperature (4sec) ......................................................... +260C Maximum Current Per Output .................................................... 25mA Storage Temperature .................................................. -65C to +150C Power Dissipation Per Package 16-pin PDIP (derate 14.3mW/oC above +70oC) ...................... 1150mW 16-pin NSOIC (derate 8.95mW/oC above +70oC) ..................... 725mW
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +3.6V with Tamb = 25C and all MIN and MAX limits apply across the recommended operating temperature range.
DC PARAMETERS Supply Voltage, VCC Enable Input Rise or Fall Times Input Electrical Characteristics Minimum Differential Input Voltage, VTH Input Resistance, RIN Input Current IIN IIN Minimum Enable HIGH Input Level Voltage, VIH(EN) Maximum Enable LOW Input Level Voltage, VIL(EN) Maximum Enable Input Current, IEN Input Hysteresis, VHYST Quiescent Supply Current, ICC Output Electrical Characteristics Minimum High Level Output Voltage, VOH Maximum Low Level Output Voltage, VOL Maximum Tri-state Output Leakage Current, IOZQ
MIN. TYP. MAX. UNITS 3.0 3 3.6 V ns
CONDITIONS
-200 5.0
50
+200
mV K
VOUT = VOH or VOL, -7V < VCM < +7V VIN = -7V, +7V, +10V other input = GND
+1.25 -1.5 2.0
+1.5 -2.5
mA mA V
VIN = +10V, other input = GND VIN = -10V, other input = GND
0.8 1.0 60 5 15
V A mV mA VIN = VCC or GND VCM = 0V VCC = +3.3V, VDIF = +1V VCC = +3.0V, VDIFF = +1V, IOUT = -6mA VCC = +3.0V, VDIFF = -1V, IOUT = +6mA VOUT = VCC or GND, ENABLE = VIL, ENABLE = VIH
2.4
2.8 0.2 0.5 0.5 5.0
V V A
Rev:A Date: 3/08/04
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
(c) Copyright 2004 Sipex Corporation
2
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +3.6V, Tamb = 25C, tr < 6ns, tf < 6ns, and all MIN and MAX limits apply across the recommended operating temperature range.
PARAMETERS SWITCHING CHARACTERISTICS Propagation Delays, tPLHD, tPHLD Skew Differential Ouput Rise and Fall Times, tTLH, tPHL Output Enable Time, tPZH Output Enable Time, tPZL Output Disable Time, tPHZ Output Disable Time, tPLZ Power dissipation Capacitance, CPD Input Capacitance, CIN
MIN. TYP. MAX. UNITS
CONDITIONS
11 0.8 4
18 2 10 40 40 35 35
ns ns ns ns ns ns ns pF pF
Figure 3 Figure 3, Note 4 Figure 3 Figure 5 Figure 5 Figure 5, Note 5 Figure 5, Note 5 Note 6
50 6
Rev:A Date: 3/08/04
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
(c) Copyright 2004 Sipex Corporation
3
RI1B RI1A R01 ENABLE R02 RI2A RI2B GND
1 2 3 4 5 6 7 8 SP26LV432
16 15 14 13 12 11 10 9
VCC RI4B RI4A R04 ENABLE R03 RI3A RI3B
PINOUT PIN DESCRIPTION
PIN NUMBER PIN NAME DESCRIPTION
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
RI1B RI1A R01 ENABLE R02 RI2A RI2B GND RI3B RI3A R03 ENABLE R04 RI4A RI4B VCC
Inverted RS-422 receiver input. Non-inverted RS-422 receiver input. TTL receiver output. Receiver input enable, active HIGH. TTL receiver output. Non-inverted RS-422 receiver input. Inverted RS-422 receiver input. Ground. Inverted RS-422 receiver input. Non-inverted RS-422 receiver input. TTL receiver output. Receiver input enable, active LOW. TTL receiver output. Non-inverted RS-422 receiver input. Inverted RS-422 receiver input. +3.0V to +3.6V power supply.
Rev:A Date: 3/08/04
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
(c) Copyright 2004 Sipex Corporation
4
AC TEST CIRCUITS AND SWITCHING TIME WAVEFORMS
VCC S1
+2.5V INPUTS (V-) - (V+) 0V -2.5V
tPHL tPLH tPLH tPHL
V+ INPUT DEVICE UNDER TEST RL
VOH 90% OUTPUT 50% VOL 10% tRISE tFALL 10% 90%
V- INPUT ENABLE ENABLE
CL
CL includes load and test jig capacitance. S1 = VCC for tPZL and tPLZ measurements. S1 = GND for tPZH and tPHZ measurements.
Figure 2. Propagation Delay
Figure 3. Test Circuit for high-Z Output Timing
ENABLE ENABLE
3.0V 1.3V GND
Differential Prop. Delay (ns)
16
1.3V
15 tPHLD
tPLZ VCC OUTPUT VOL VOH OUTPUT 0V tPHZ 0.5V 0.5V
tPZL 50%
14 tPLHD 13
50% tPZH
12
11
10 -40
-15
10
35
60
85
Temperature (C)
Figure 4. High Impedance Output Enable and Disable Waveforms
17
Figure 5. Differential Propagation Delay vs Temperature
2 1.8 tPHLD 1.6 1.4 1.2 1 0.8
16
Differential Prop. Delay (ns)
14
13
tPLHD
12
11 3.0
Differential Skew (ns)
3.4 3.5 3.6
15
3.1
3.2
3.3
0.6 -40 -15 10 35 60 85
Power Supply Voltage (V)
Temperature (C)
Figure 6. Differential Propagation Delay vs Supply Voltage
Rev:A Date: 3/08/04
Figure 7. Differential Skew vs Temperature
(c) Copyright 2004 Sipex Corporation
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
5
2.0 1.8 1.6
3.3 VCC = 3.3V 3.1
Output High Voltage (V)
Differential Skew (ns)
2.9 T = -40C
1.4 1.2 1.0 0.8
2.7
2.5 T = +25C 2.3 T = +85C
0.6 3.0 3.1 3.2 3.3 3.4 3.5 3.6
2.1 0 5 10 15 20
Power Supply Voltage (V)
Output High Current (mA)
Figure 8. Differntial Skew vs Supply Voltage
Figure 9. High Output Voltage vs Current over Temperature
1.6 1.4
3.6
3.2 VCC = 3.6V
1.2
VCC = 3.3V
T= +85C
Output High Voltage (V)
2.8 VCC = 3.3V VCC = 3.0V 2.0
Output Low Voltage (V)
1.0 0.8 0.6 0.4
T=+25C
2.4
T= -40C
1.6
0.2 0.0
1.2 0 5 10 15 20 25
0
5
10
15
20
Output High Current (mA)
Output Low Current (mA)
Figure 10. High Output Voltage vs Current over Supply Voltage
Figure 11. Low Output Voltage vs Current over Temperature
1.4 VCC = 3.0V 1.2 1.0 VCC = 3.3V 0.8 0.6 0.4
15 45
Output Low Voltage (V)
Input Resistance (K)
35
VCC = 3.6V
25
0.2 0.0 0 5 10 15 20
5 -10.0 -8.0
-6.0 -4.0
-2.0
0.0
2.0
4.0
6.0
8.0 10.0
Output Low Current (mA)
Input Voltage (V)
Figure 12. Low Output Voltage vs Current over Supply Voltage
Rev:A Date: 3/08/04
Figure 13. Input Resistance vs Input Voltage
(c) Copyright 2004 Sipex Corporation
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
6
0.9 +10V @ Inverting Input 0.6 0.3 +10V @ Non-Inverting Input
80 VHYST 60 VTH
Transition Voltage (mV)
Input Current (mA)
40
0.0 -0.3 -0.6
0V @ Inverting Input 0V @ Non-Inverting Input
20 VCC = 3.3V 0 VTL
-0.9 -1.2 3.0 3.1 3.2
-10V @ Inverting Input -10V @ Non-Inverting Input 3.3 3.4 3.5 3.6
-20
-40 -40
-15
10
35
60
85
Temperature (C)
Power Supply Voltage (V)
Figure 14. Input Current vs Supply Voltage
Figure 15. Transition Voltage vs Temperature
80 VHYST 60
7.0 VCC = 3.3V 6.5
Transition Voltage (mV)
20
Supply Current (mA)
VTL 3.0 3.1 3.2 3.3 3.4 3.5 3.6
40
6.0
5.5
0
5.0
-20
4.5
-40
Power Supply Voltage (V)
4.0 -40
-15
10
35
60
85
Temperature (C)
Figure 16. Transition Voltage vs Supply Voltage
Figure 17. Supply Current vs Temperature
7.0 6.5
5.4 VCC = 3.0V 5.1 50pF Load
Disabled Supply Current (mA)
6.0
Supply Current (mA)
5.5 5.0 4.5 4.0 3.5 3.0 3.0 3.1 3.2 3.3 3.4 3.5 3.6
4.8 1 TTL Load 4.5
4.2
No Load
3.9
3.6 1 10 100 1000 10000 100000
Power Supply Voltage (V)
Data Rate (kBaud)
Figure 18. Disabled Supply Current vs Supply Voltage
Rev:A Date: 3/08/04
Figure 19. Supply Current vs Data Rate
(c) Copyright 2004 Sipex Corporation
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
7
The SP26LV432 is a low-power quad differential line receiver designed for digital data transmission meeting specifications of the EIA standard RS-422 protocol. The SP26LV432 features Sipex's BiCMOS process allowing low power operational characteristics of CMOS technology while meeting all of the demands of the RS-422 serial protocol to at least 50Mbps under load in harsh environments. The RS-422 standard is ideal for multi-drop applications and for long-distance communication. The RS-422 protocol allows up to 10 receivers to be connected to a data bus, making it an ideal choice for multi-drop applications. Since the cabling can be as long as 4,000 feet, the RS-422 receivers have an input sensitivity of 200mV over the wide (-7.0V to +7.0V) common mode range to accommodate ground potential differences. Internal pull-up and pull-down resistors prevent output oscillation on unused channels. Because the RS-422 is a differential interface, data is virtually immune to noise in the transmission line.
THEORY OF OPERATION The SP26LV432 accepts RS-422 levels and translates these into TTL or CMOS input levels. The SP26LV432 features active HIGH and active LOW receiver enable controls common to all four receiver channels. A logic HIGH on the ENABLE pin (pin 4) or a logic LOW on the ENABLE pin (pin 12) will enable the differential receiver outputs. A logic LOW on the ENABLE pin (pin 4) and a logic HIGH on the ENABLE pin (pin 12) will force the receiver outputs into high impedance (high-Z). Refer to the truth table in Figure 20. The RS-422 line receivers feature high source and sink current capability. All receivers are internally protected against short circuits on their inputs. The receivers feature tri-state outputs with 6mA source and sink capability. The typical receiver propagation delay is 14ns (35ns max). To minimize reflections, the multipoint bus transmission line should be terminated at both ends in its characteristic impedance, and stub lengths off the main line should be kept as short as possible.
ENABLE LOW HIGH HIGH don't care don't care HIGH don't care
ENABLE HIGH don't care don't care LOW LOW don't care LOW
Input don't care VID > VTH (max) VID < VTH (min) VID > VTH (max) VID < VTH (min) open open
Output high-Z
Driver Side such as SP26LV431 Receiver Side such as SP26LV432
HIGH
ENABLE
LOW HIGH LOW HIGH HIGH
DATA *RT DATA OUTPUT
*RT is optional although highly recommended to reduce reflection.
Figure 20. Truth Table, Enable/Disable Function Common to all Four RS-422 Receivers
Figure 21. Two-Wire Balanced Systems, RS-422
Rev:A Date: 3/08/04
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
(c) Copyright 2004 Sipex Corporation
8
PACKAGE: 16 PIN PDIP
A1 D A N D1 b3 e b1 b L A2
INDEX AREA
E1 E
123
Dimensions in (mm)
16 PIN PDIP JEDEC MS-001 (BB) Variation MIN NOM MAX .015 .115 .014 .045 .030 .008 .735 .005 .300 .240 .130 .018 .060 .039 .010 .755 .310 .250 .100 BSC .300 BSC .115 .130 .430 .150 .210 .195 .022 .070 .045 .014 .775 .325 .280
E
A A1 A2 b b2 b3 c D D1 E E1 e eA eB L
SEE LEAD DETAIL
c eA eB
b
C
16 pin PDIP
Rev:A Date: 3/08/04 SP26LV432 High Speed, Low Power Quad Differential Line Receiver (c) Copyright 2004 Sipex Corporation
9
PACKAGE: 16 PIN NSOIC
D
A
E/2 E1 E E1/2
SEE VIEW C
1 INDEX AREA (D/2 X E1/2)
e B
b
TOP VIEW
WITH PLATING
O1
b
Gauge Plane L2 Seating Plane
O1
L L1
O
c
VIEW C
BASE METAL
CONTACT AREA
DIMENSIONS Minimum/Maximum (mm)
16 Pin NSOIC
(JEDEC MS-012, AC - VARIATION)
COMMON HEIGHT DIMENSION
A
A2
A1
SIDE VIEW
SYMBOL A A1 A2 b c E E1 e L L1 L2 O O1
MIN NOM MAX - 1.75 1.35 0.25 0.10 1.25 1.65 0.31 0.51 0.17 0.25 6.00 BSC 3.90 BSC 1.27 BSC 0.40 1.27 1.04 REF 0.25 BSC 0 8 5 - 15
16 PIN NSOIC
Rev:A Date: 3/08/04 SP26LV432 High Speed, Low Power Quad Differential Line Receiver (c) Copyright 2004 Sipex Corporation
10
ORDERING INFORMATION
Model .................................................................................... Temperature Range ..................................................................................... Package SP26LV432CP ............................................................................. 0C to +70C ..................................................................................... 16-pin PDIP SP26LV432CN ............................................................................ 0C to +70C .................................................................................. 16-pin NSOIC Please consult the factory for pricing and availability on a Tape-On-Reel option.
REVISION HISTORY
DATE 3/08/04 REVISION A DESCRIPTION Production Release.
Corporation
ANALOG EXCELLENCE
Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Rev:A Date: 3/08/04
SP26LV432 High Speed, Low Power Quad Differential Line Receiver
(c) Copyright 2004 Sipex Corporation
11

▲Up To Search▲

Price & Availability of SP26LV432CN

	To Download SP26LV432CN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .